Description: 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse Platform: |
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Author:NOOW |
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Description: 介绍一种用于卫星姿态测量的CMOS图像敏感器--STAR250的时序驱动信号，并使用Verilog HDL语言设计驱动时序电路。经布线、仿真、测试后验证了驱动信号的正确性。 -Introduce a measurement for the satellite attitude CMOS image sensor- STAR250 timing drive signals, and use the Verilog HDL language design-driven sequential circuits. After routing, simulation, testing verified the correctness of the drive signal. Platform: |
Size: 106496 |
Author:zhaox |
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Description: 本文围绕一个包含Nios II软核处理器的可编程片上系统展开数码相机的样机设计。论文首先对样机所要达到的整体功能进行了规划，接下来并行开展了软硬件设计。在硬件方面，充分利用了所使用平台提供的SD卡插槽、键盘、数码管、SRAM等各种硬件资源，并用Verilog HDL硬件描述语言设计了样机系统所需要的VGA接口控制器、CMOS图像传感器接口控制器以及VGA显示存储器；在软件方面，本文基于Nios II软核处理器用C语言实现了SD卡的驱动、FAT文件系统的移植、VGA显视器的驱动以及BMP图片文件的转换与显示等功能，并能通过键盘操作和用户界面控制样机拍照和相片浏览。实验结果表明本样机系统设计正确，软硬件各模块绝大部分工作正常，为进一步研究数码相机的应用建立起了一个实用平台。-This paper focuses on a Nios II soft core processors, programmable on-chip system to launch a digital camera prototype design. Firstly, the overall function of the prototype to be achieved by planning, then in parallel hardware and software design. Take full advantage of the hardware side, using the platform provided by the SD card slot, keyboard, digital tube, SRAM and other hardware resources, and using Verilog HDL hardware description language to design a prototype system VGA interface controller, CMOS image sensors interface controller and the VGA display memory the software side, based on the Nios II soft core processor implemented in C, the SD card driver, and the transplantation of the FAT file system, the VGA display driver, and BMP image file conversion and display function, and through the keyboard and user interface control prototype photographs and photo browsing. The experimental results show that this prototype system is designed properly, most of the hardware and softwa Platform: |
Size: 15078400 |
Author: |
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